1. What did Nvidia announce about co-packaged optics capacity?
Nvidia said on October 21 that it will work with packaging partner Siliconware Precision Industries (SPIL) to expand its co-packaged optics capacity 15-fold by mid-2027, with a further doubling targeted by the end of 2028. The plan, which would lift output about 30 times over two years, was set out at the company's GTC event in Berlin by founder and CEO Jensen Huang.
Co-packaged optics, usually shortened to CPO, places the components that turn electrical signals into light directly beside the switch silicon instead of in separate plug-in modules. Nvidia is betting that this design will become the standard way to connect the thousands of accelerators inside large AI clusters.
The 15x figure describes manufacturing capacity for optical engines, the light-handling units at the heart of the technology. It is a target set by Nvidia and its partner, not output already achieved, and it depends on the supply chain delivering on schedule.
2. How does co-packaged optics work?
Co-packaged optics moves the conversion between electricity and light from the edge of a server rack to the surface of the switch package itself. In a conventional layout, a switch chip sends electrical signals across a circuit board to a pluggable transceiver, which converts them to light for transmission over fiber. Each of those hops costs power and weakens the signal.
By mounting the optical engine alongside the chip, the electrical path shrinks to a very short distance. A shorter path generally means lower power use for each bit moved, better signal integrity and less delay. Those gains matter most in AI training clusters, where a single job can span a very large number of accelerators that must exchange data constantly.
Copper cabling and board traces have physical limits that become harder to manage as data rates climb. Power draw, signal degradation and the amount of bandwidth that can be packed into a given space all constrain what electrical links can do. Optical links use light, which avoids many of those limits, and that is why the industry has discussed moving from copper to optics for years.
3. Why are AI data centers turning to optical links?
AI models keep growing, and operators keep packing more accelerators into each facility. As a result, the cables and connectors that tie chips together have become a bottleneck alongside the chips themselves. Moving data between processors can limit how fast a cluster trains a model, however powerful each processor is.
Huang pointed to this pressure in Berlin, describing the optical expansion as the start of one of the largest infrastructure buildouts in history. He tied the effort to demand that runs well above the normal pace of the industry, and said that capacity is the constraint on how quickly that demand can be met.
For years the practical obstacle to co-packaged optics was not interest from customers but the difficulty of producing optical engines at scale. Recent advances in engineering and economics have made large-scale deployment more realistic, and the growth of training clusters linking thousands of accelerators has accelerated the timeline. Nvidia's plan with SPIL is aimed squarely at that production problem.
The scale of the targets also shows how far planning has moved ahead of today's deployments. A 15-fold increase would only be sensible if Nvidia expects optical switching to take a much larger share of its networking business, and a further doubling afterward implies that the company sees demand continuing to rise beyond 2027. Huang's remarks in Berlin presented the expansion as a response to that expected growth rather than as an experiment.
4. What else did Nvidia commit to with its supply chain partners?
The optical expansion was one part of a wider package. Nvidia said it would expand capacity with six partners across substrates, advanced packaging, testing and optical engines. The companies named were Amkor Technology, IBIDEN, King Yuan Electronics (KYEC), Samsung Electro-Mechanics, SPIL and Unimicron Technology Corporation.
The largest single dollar figure involves KYEC. Nvidia has committed $1.1 billion as a capacity reservation advance supporting new testing facilities in the United States. High-volume production at those facilities is targeted to begin in April 2027. Testing is the step in which finished chips are checked before shipment, and it can limit output when volumes rise sharply.
Amkor, another important packaging partner, plans to raise its interposer wafer capacity by more than 300% by the end of 2028. An interposer is a substrate that lets several chiplets or dies communicate at high speed inside one package. A rise of more than threefold signals that suppliers expect demand for advanced packaging to keep climbing well beyond the next year.
5. What is SPIL's role in the plan?
SPIL, short for Siliconware Precision Industries, is a packaging and testing specialist, and Nvidia has named it as the partner responsible for growing optical-engine capacity. The company aims to scale that capacity 15 times by mid-2027 and then double it again by the end of 2028, which together amounts to a 30-fold increase.
The sequencing is notable. The first jump is compressed into roughly the next eight months, while the second stretches across the following year and a half. That pattern suggests the early expansion covers the initial buildout of production lines, and the later doubling builds on equipment and processes already in place.
Packaging has become a strategic bottleneck across the AI supply chain, because advanced chips are only useful once they are assembled, connected and tested. By naming partners and dates, Nvidia is describing the scale it intends to build rather than offering a forecast for an abstract market.
6. Why do packaging and testing capacity matter so much?
A modern AI accelerator is not a single piece of silicon. It is an assembly of several dies, memory stacks and connecting layers, and each of those must be joined and verified before the product can ship. Fabricating the chip is only the first stage of that process, and the later stages can set the pace for the whole industry.
Interposers illustrate the point. These thin substrates carry the dense wiring that lets separate dies exchange data quickly inside one package, so a shortage of interposer wafers can hold up finished processors even when the chips themselves are available. Amkor's plan to add more than 300% to that capacity by the end of 2028 targets exactly this kind of constraint.
Testing works the same way. Every finished package has to be checked for defects, and as volumes rise, testing equipment and floor space can become the limit. Nvidia's $1.1 billion advance to KYEC reserves capacity at facilities in the United States, which gives the company a guaranteed share of that scarce step once production begins in April 2027.
Optical engines add a new item to the list. Because they sit within the switch package, they must be manufactured, aligned and tested alongside the silicon they serve. That makes the 15x target a statement about an entire production flow, not just about a single component.
7. How does this compare with the pluggable approach?
Pluggable optical modules have long been the standard in data center networks. They are separate devices that slot into the front of a switch, which makes them easy to replace and lets operators mix suppliers. That flexibility is a genuine advantage, and it is a major reason the approach has lasted.
The tradeoff is the electrical distance between the switch chip and the module. Over that distance, signals need extra processing to stay clean, and that processing consumes power. Co-packaged designs shorten the path, which lowers the energy needed, but they integrate optics more tightly with the switch, so a fault can be harder to service than in a modular system.
For very large AI clusters, the energy and density benefits are the reason Nvidia is pushing the shift. The company is betting that, at the scale of thousands of linked accelerators, the efficiency gains outweigh the loss of modularity. Whether customers agree will become clearer as capacity comes online and more systems are deployed.
8. What does the expansion mean for AI infrastructure?
If the targets are met, optical interconnects built directly into switch packages could move from a niche option to a mainstream choice in new AI facilities. Lower power use per bit is especially relevant because electricity supply is a growing constraint on where and how quickly data centers can be built.
The announcement also shows how much of the AI buildout now depends on manufacturing steps beyond chip fabrication itself. Substrates, packaging, testing and optical engines each have their own capacity limits, and a shortfall in any one of them can hold back the whole system. Spreading commitments across six companies is a way to reduce that risk.
There are caveats. The figures are plans, and large manufacturing ramps often run into delays in equipment delivery, yield and qualification. The numbers also measure capacity rather than shipments, so they do not by themselves indicate how many CPO systems customers will actually deploy.
9. What should readers watch next?
The first checkpoint is mid-2027, when SPIL's optical-engine capacity is meant to reach 15 times its current level. April 2027 is the target for high-volume production at the new KYEC testing facilities in the United States, and the end of 2028 is the deadline for both the second SPIL doubling and Amkor's interposer expansion.
Progress reports from the partners, along with any changes to those dates, will show whether the buildout is keeping pace with the demand Huang described. Observers will also look for evidence that customers are placing orders for co-packaged optics systems at a scale that justifies the capacity being created.